Hello!

I am Shashank Nag, a PhD student in the Laboratory of Computer Architecture at UT Austin, advised by Prof. Lizy K John. I received my Bachelors in Electrical Engineering from the Indian Institute of Technology Madras. I am passionate about Hardware Accelerators, Computer Architecture, & Digital Design. I primarily work on building Hardware Accelerators for Machine Learning algorithms, and in the ML Algorithm Hardware co-design realm. My current research focus is on Weightless Neural Networks and design of associated energy-efficient accelerators.

News

• [March 2025] I am on the Artifact Evaluation Committee (AEC) for ISCA 2025. If you have an accepted paper, please consider submitting your artifacts for evaluation!
• [March 2025] Presenting at the Young Architect’s Workshop (YArch) at ASPLOS 2025 (Rotterdam, NL). Drop by to say hi if you are around!
• [Feb 2025] “tinyML for Human Activity Recognition”, Bacellar, Jadhao, Nag, et al. accepted at EdgeAI Symposium 2025, held in Austin, TX.
• [June 2024] “Lightweight Vision Transformers for Low Energy Edge Inference”, Nag et al. accepted at ML for Computer Architecture and Systems (MLArchSys) Workshop 2024, colocated at the IEEE International Symposium on Computer Architecture (ISCA) 2024, to be held in Buenos Aires, Argentina during June 29th-July 3rd 2024.
• [May 2024] “LogicNets vs. ULEEN : Comparing two novel high throughput edge ML inference techniques on FPGA”, Nag, Susskind et al. accepted at IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS) 2024, to be held in Springfield, MA during August 11th-14th 2024.
• [Aug 2023] Starting my PhD program at the University of Texas at Austin advised by Prof. Lizy John. Hook’em!
• [Jan 2023] “ViTA : a Vision Transformer Inference Accelerator for Edge Applications”, Nag et al. accepted at IEEE International Symposium on Circuits and Systems (ISCAS) 2023, to be held at Monterey, CA during May 21st-25th 2023.