Hello!

I am Shashank Nag, a PhD student in the Laboratory of Computer Architecture, Chandra Family Department of Electrical and Computer Engineering at The University of Texas at Austin. I earned my Bachelors in Electrical Engineering from the Indian Institute of Technology Madras. I am passionate about Hardware Accelerators, Computer Architecture, & Digital Design. I primarily work on building Hardware Accelerators for Machine Learning algorithms, and in the ML Algorithm Hardware co-design realm. My current research focus is on Weightless Neural Networks and design of associated energy-efficient edge accelerators.

News

• [June 2024] “Lightweight Vision Transformers for Low Energy Edge Inference”, Shashank Nag, Logan Liberty, Aishwarya Sivakumar, Neeraja J. Yadwadkar and Lizy K John : accepted at ML for Computer Architecture and Systems (MLArchSys) Workshop 2024, colocated at the IEEE International Symposium on Computer Architecture (ISCA) 2024, to be held in Buenos Aires, Argentina during June 29th-July 3rd 2024.
• [May 2024] “LogicNets vs. ULEEN : Comparing two novel high throughput edge ML inference techniques on FPGA”, Shashank Nag, Zachary Susskind, Aman Arora, Allan T.L. Bacellar, Diego L.C. Dutra, Igor D.S. Miranda, Krishnan Kailas, Eugene B. John, Mauricio Breternitz Jr., Priscila M. V. Lima, Felipe M. G. Franca and Lizy K. John : accepted at IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS) 2024, to be held in Springfield, MA during August 11th-14th 2024.
• [Jan 2023] “ViTA : a Vision Transformer Inference Accelerator for Edge Applications”, Shashank Nag, Gourav Datta, Souvik Kundu, Nitin Chandrachoodan, and Peter A. Beerel : accepted at IEEE International Symposium on Circuits and Systems (ISCAS) 2023, to be held at Monterey, CA during May 21st-25th 2023.