Hello!

I am Shashank, a PhD student in the Laboratory of Computer Architecture at UT Austin, advised by Prof. Lizy K John. I received my Bachelors in Electrical Engineering from the Indian Institute of Technology Madras. I am passionate about Hardware Accelerators, Computer Architecture, & Digital Design. I primarily work in the ML Algorithm Hardware co-design space. My current research focus is on LUT-based Weightless Neural Networks, and design of associated energy-efficient accelerators.

News

• [July 2025] I am on the Artifact Evaluation Committee (AEC) for MICRO 2025.
• [May 2025] “Hybrid Weightless Neural Networks for efficient edge inference”, Jadhao, Bacellar, Nag et al. accepted at FPL 2025, Leiden, NL.
• [April 2025] Our team is one of the finalists in Qualcomm Innovation Fellowship North America 2025.
• [March 2025] I am on the Artifact Evaluation Committee (AEC) for ISCA 2025. If you have an accepted paper, please consider submitting your artifacts for evaluation!
• [March 2025] Presenting at the Young Architect’s Workshop (YArch) at ASPLOS 2025 (Rotterdam, NL). Drop by to say hi if you are around!
• [Feb 2025] “tinyML for Human Activity Recognition”, Bacellar, Jadhao, Nag, et al. accepted at EdgeAI Symposium 2025, Austin, TX.
• [June 2024] “Lightweight Vision Transformers for Low Energy Edge Inference”, Nag et al. accepted at ML for Computer Architecture and Systems (MLArchSys) Workshop 2024, colocated at ISCA 2024, Buenos Aires, Argentina.
• [May 2024] “LogicNets vs. ULEEN : Comparing two novel high throughput edge ML inference techniques on FPGA”, Nag, Susskind et al. accepted at IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS) 2024, Springfield, MA.
• [Aug 2023] Starting my PhD program at the University of Texas at Austin advised by Prof. Lizy John. Hook’em!
• [Jan 2023] “ViTA : a Vision Transformer Inference Accelerator for Edge Applications”, Nag et al. accepted at IEEE International Symposium on Circuits and Systems (ISCAS) 2023, to be held at Monterey, CA.