I have been learning to play the Indian classical instrument Tabla for the last 7 years, and have learnt the Hindustani style of Vocal music for about 2 years. I’m also passionate about preserving and promoting Indian classical music and its deeply rooted culture and heritage. Towards this, I’m involved with local university chapters of SPIC MACAY – currently at UT Austin and previously at IIT Madras. 
I am fond of speaking opportunities, including debates, speeches & extempores. I have also hosted Nobel Laureate Dr. Barry Barish, renowned economist Dr. Raghuram Rajan, and former ISRO Chairmen Dr. G. Madhavan Nair and Dr. K. Radhakrishnan, as a part of our institute’s annual technical festival. Do checkout the embedded links to the videos! I also write occasionally, more on that later.
I’ve been lucky to travel to various parts of India, Europe, and United States, and explore the diverse cultures there. I often pen down my thoughts on these trips, and love to take pictures with my DSLR (or even my mobile :)), particularly when it involves nature. Trying to put together a collection of pictures sometime soon :) 
My current research work broadly revolves around Look-up-Table (LUT) based Weightless Neural Networks, in an effort to develop hardware-centric and edge-efficient Machine Learning models. Read more about this here! 
I have delved into a range of projects focussing on hardware accelerators for various applications. Of late, I’m particularly focusing on machine learning applications on embedded platforms. Read more about some of my work in this area here! 
In the past, I have also explored microarchitectural optimizations. Checkout this repository for work involving Branch Prediction and Cache Replacement policies. 
I am passionate about interdisciplinary research problems that align with Digital Design, with a special inclination towards translational research. You can find more about some of my work at the intersection of Computer Engineering and Biotechnology here. 
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Final presentation for the IUSSTF Viterbi Summer Research Experience Program, titled “Hardware Accelerators for Vision Transformers”. Find the poster here
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I presented a poster titled “Predicting Rupture Potential of Cerebral Aneurysms”, based on the work carried out under the Young Research Fellow Program 2021-22. Find the poster here 
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Presented a poster on “Quasi-Weightless Vision Transformers” at the UT Austin iMAGiNE Consortium Symposium 2024.
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Virtual presentation of our work on “Lightweight Vision Transformers for low energy edge inference” at the MLArchSys workshop at ISCA 2024. Find the recorded talk here.
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Presented the Annual Review Presentation of the Semiconductor Research Corporation (SRC) AI Hardware Task 3148.001 “Ultra Low Energy Ultra Low Latency Machine Learning using Weightless Neural Networks” at the Combined AIHW/HWS Review held in July 2024, at ADI Wilmington.
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I presented our work titled “LogicNets vs. ULEEN : Comparing two novel high throughput edge ML inference techniques on FPGA” at MWSCAS 2024. 
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I presented our work titled “Quasi-Weightless Vision Transformers” at SRC TECHCON 2024. 
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Presented on “Hashing and Filtering Techniques for Weightless Neural Networks”.
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Title - LL-ViT: Edge Deployable Vision Transformers with Look Up Table Neurons
Abstract - Vision Transformers have been tremendously successful in computer vision tasks. However, their large computational, memory, and energy demands are a challenge for edge inference on FPGAs – a field that has seen a recent surge in demand. We recognize the benefits of recent works on logic and Look Up Table (LUT) based networks, such as LogicNets, NeuraLUT, DWN, among others, in offering models that simultaneously reduce both the memory and compute footprints. However, these models natively do not perform well on common vision tasks, such as CIFAR-10/100. In this work, we propose LL-ViT, a novel edge optimized vision transformer design that integrates layers of LUT neurons within the transformer architecture. Based on our characterization that reveals that a majority of model weights and computations are from the channel mixer (MLP layer), we design an alternate LUT-based channel mixer, and simultaneously develop an FPGA-based accelerator for LL-ViT. Contrary to some attempts to replace each multiplication with a table lookup, our architecture utilizes a neural learning approach which natively learns the LUT functions. This approach allows for reduced model sizes, and a computational and energy-efficient inference solution for vision transformer models. Evaluating on edge-suitable workloads, we achieve accuracies of 95.5% on CIFAR-10, 78.8% on CIFAR-100, and 60.9% on Tiny-ImageNet datasets, comparable to the baseline transformer. LL-ViT eliminates over 60% of the model weights and 50% of the multiplications in the model, and achieves 1.9x energy efficiency and 1.3x lower latency over an integer quantized ViT accelerator, while also offering superior throughput against prior works at a 10.9W power budget.
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Title - Weightless Neural Networks : Towards ending the wait for edge hardware-centric Machine Learning
Abstract - Deploying fast, accurate, and efficient machine learning on edge devices remains a key research challenge. Deep Neural Networks (DNNs) have been traditionally popular, with wide ranging applications across domains. However, their computational and storage demands often hinder their deployment on edge devices that have stringent resource, latency, and energy budgets; with model quantization, pruning, and other such techniques being active areas of research to mitigate this. Weightless Neural Networks (WNNs), an unconventional class of look-up table based neural networks, offer an efficient alternative to DNNs. These networks eliminate most of the conventional model “weights”, and their architecture closely resembles the underlying logic fabric of hardware devices like FPGAs. However, these have been historically underutilized, and have been limited to relatively tiny models and simple applications. In this talk, I will present some of our recent research in the field of WNNs and their associated hardware accelerators, with an emphasis on our latest work (LL-ViT) that further extends these to the realm of vision transformers — making a case for mainstream adoption of these hardware-centric neural networks. Compared to their DNN (ViT) counterparts, LL-ViTs offer upto 2x energy efficiency on FPGAs/ASICs, with about 60% reduction in model weights and computations, while achieving better accuracies on image classification tasks across datasets like CIFAR-10/100, TinyImageNet and others. Towards the end, I will also briefly touch upon architectural enhancements to mainstream compute devices, like GPUs, to further improve the benefits offered by these networks.
Undergraduate Course, Dept. of Electrical Engineering, Indian Institute of Technology Madras, 2022
I was a Teaching Assistant for the EE2003 Computer Organization course offered by Prof. Nitin Chandrachoodan in Fall’22. My responsibilities included conducting weekly lab sessions, and evaluating students. I also held periodic discussion and feedback sessions with my assigned group of students.
Undergraduate Course, Dept. of Electrical Engineering, Indian Institute of Technology Madras, 2023
I was a Teaching Assistant for the EE2703 Applied Programming Lab course offered by Prof. Nitin Chandrachoodan in Spring’23.
Upper Division Undergraduate Course, Chandra Family Department of Electrical and Computer Engineering, The University of Texas at Austin, 2023
I was a Teaching Assistant for the ECE Capstone Design class offered by Prof. Leonard (Frank) Register in the Fall’23 - Spring ‘24 iteration. My responsibilities included mentoring student groups, conducting weekly progress reviews, and evaluating students.
Undergraduate Research, , 2023
I am always excited about mentoring juniors on any aspects of undergraduate programs or research - be it related to courses, specializations, undergraduate research, research internship programs, or even application procedures for these. I’d also be happy to review application packages for research internship programs and graduate school applications. If you feel our backgrounds align and I might be of help to you, feel free to shoot me an email at shashanknag@utexas.edu. If you are from EE@IITM, check out the EE Research Club that a few of us initiated!